Intel Foundry Describes New 18A-P Process
The 2nm-class process enables high-performance chips. It features a dual contact, low resistance transistor option
By Mark LaPedus
At this week’s VLSI Symposium, Intel Foundry provided an update on its process roadmap, including the status of its new 18A-P technology.
Targeted for the foundry market, Intel’s 18A-P process has entered risk production. The 2nm-class process enables high-performance chips with lower power. It also features a new dual contact, low resistance transistor option.
Based in Santa Clara, Calif., Intel is a supplier of processors for PCs and servers. The company also has a foundry unit, which is called Intel Foundry.
Foundry vendors make chips for other companies in large facilities called fabs. TSMC, Samsung, SMIC, UMC, GlobalFoundries and others compete in the foundry business. So far, Intel has struggled to get a foothold in the competitive foundry business, but the company’s fortunes could change with its new 18A-P technology.
18A-P is a new derivative of Intel’s 18A technology. Introduced last year, Intel’s 18A process is a 2nm-class technology. It combines a gate-all-around (GAA) transistor architecture with a backside power delivery technology.
Earlier this year, Intel launched its Core Ultra Series 3 processor line, marking the debut of the company’s first chips built on its new 18A process technology. Intel’s processor is codenamed Panther Lake.
The 18A process is more or less optimized for Intel’s own processor lines. In contrast, 18A-P is optimized for the leading-edge foundry market.
“Intel 18A-P builds on the same GAA and backside power foundation while remaining design-rule compatible with Intel 18A. This enables customers to gain performance benefits without redesigning entire layouts or libraries,” said Lori Scott, senior director of marketing at Intel Foundry, in a blog.
Intel 18A-P delivers 9% higher performance at iso-power or 18% lower power at iso-performance compared to Intel 18A.
“Intel 18A‑P also introduces material innovations that deliver 20-40% improvement in thermal resistance of the overall stack when combined with enhanced electronic design automation (EDA) workflows, building on earlier improvements introduced with Intel 18A,” Scott said.
“Intel 18A-P also features Power Boost, the industry’s first implementation of a novel dual contact architecture. Enabled by PowerVia backside power delivery, low-resistance frontside and direct backside contacts show improved resistance for both NMOS and PMOS transistors compared to Intel 18A. Intel 18A-P enables enhanced performance at matched footprint for power-constrained applications including mobile, AI accelerators, and data centers,” Scott said.