U.S. Advanced Packaging Consortium Expands
The so-called US-JOINT Consortium now has 12 members. Who is this group?
By Mark LaPedus
The US-JOINT Consortium, a new U.S.-based advanced packaging group, is expanding its membership.
3M is the latest company to join the US-JOINT Consortium, which is a group that plans to research and develop next-generation advanced packaging and back-end processing technologies. Packaging is fast becoming an important part of the semiconductor industry. This new consortium represents one of several efforts to bring back more IC packaging R&D and production to the United States.
Announced in 2024, the US-JOINT Consortium is led by Japan’s Resonac, a supplier of semiconductor materials and other products. In 2023, Showa Denko and Hitachi Chemical were integrated to form a new company called Resonac.
Other members of the US-JOINT Consortium are Azimuth, KLA, Kulicke & Soffa, Moses Lake Industries, MEC, Ulvac, Namics, TOK, Toppan and TOWA. Now, 3M is joining the group.
The development work for the US-JOINT Consortium will take place in a new R&D center in Union City, Calif. Each partner will invest in the facility. The construction of cleanrooms and equipment installation started in 2024. The facility is expected to be fully operational in 2025.
What is packaging?
Packaging is an important part of the semiconductor industry. In the semiconductor process flow, a company designs a chip line using specialized software tools. Then, a chipmaker manufactures the chip line based on that design in a large facility called a fab.
Once the chip line is manufactured in a fab, the devices are then sent to a packaging house. The packaging house then assembles the chips into an IC package. A package is a product that houses or encloses a chip and protects it from harsh operating conditions.
Several types of companies provide assembly and packaging services for chip customers. The first type are outsourced semiconductor assembly and test (OSAT) vendors, which specialize in providing third-party packaging and testing services for customers. Amkor, ASE, JCET and others are considered OSATs.
Several foundry vendors, such as Intel, Samsung and TSMC, also provide packaging services for customers. Foundries also provide chip manufacturing services as well.
Over the years, the semiconductor industry has developed a multitude of different package types. Each type is geared for a specific application. Some packages are simple, commodity-level products, which are used for more mature chip types. Some are considered mid-range packages, which are used for more advanced chips.
Still others are classified as advanced packages, which are used for the most complex chips, such as FPGAs, GPUs and processors. Generally, advanced packages incorporate multiple and different chips in the same unit. An advanced package is used to boost the overall performance of a given chip line.
Chiplets are also a hot topic. In chiplets, the idea is to break up a large device into smaller dies. Then, the dies are assembled in an advanced package.
OSATs and select foundries produce a wide variety of packages in large manufacturing facilities. A large percentage of the world’s packaging manufacturing capacity is located in Asia. Packaging facilities can be found in China, Malaysia, Philippines, Singapore, Taiwan and Vietnam.
There are perhaps two dozen or more companies that provide IC packaging services in the United States. Generally, though, U.S.-based packaging companies are small- to mid-sized entities. In total, the U.S. manufacturers less than 5% of the world’s packages.
On top of that, the U.S. has seen a sharp decline in chip manufacturing. The U.S.’s worldwide share of chip-manufacturing capacity has declined from 37% in 1990, to 19% in 2000, and to 10% in 2022, according to the U.S. Semiconductor Industry Association (SIA) and Boston Consulting Group.
U.S. packaging efforts
To help reverse those trends, the U.S. government in 2022 launched a new program called the CHIPS and Science Act. The CHIPS Act set aside $39 billion in grants for manufacturing and $11 billion in funding for R&D and workforce development. The goal is to expand chip and packaging production in the U.S. (Click here for a list of the companies and entities involved in the CHIPS Act.)
So far, though, the U.S. government has provided only a small percentage of the funding to select companies or R&D entities involved in the CHIPS Act. Right now, the CHIPS Act is more or less on hold. The Trump administration is in the process of evaluating the program.
The CHIPS Act isn’t the only way to bring back or reshore more chip and packaging production to the U.S. Some are relying on other forms of government funding.
Last year, for example, the U.S. Defense Advanced Research Projects Agency (DARPA) awarded $840 million to the Texas Institute for Electronics (TIE) at the University of Texas at Austin to establish an advanced packaging production facility.
Meanwhile, in a separate effort, GlobalFoundries recently announced plans to build a new packaging facility in New York state. GlobalFoundries has obtained state and federal funding to build the plant.
Some are expanding their efforts in packaging without CHIPS funding. For example, NHanced Semiconductors, a U.S.-based packaging company, is expanding its manufacturing capacity in several locations in the U.S. NHanced hasn’t obtained CHIPS funding.
“NHanced is focused on being a one-stop shop for advanced packaging, emphasizing engineering agility. Unlike major foundries, which prioritize high-volume clients, we cater to lower-volume, high-complexity needs. For instance, our processes support wafer reconstruction, optical and RF interposers, MEMS work, and 3D designs,” said Bob Patti, president and chief executive of NHanced, in a recent interview.
Meanwhile, the consortium model is another way to expand packaging R&D and production in the U.S. The US-JOINT Consortium is one such model. Bringing packaging R&D closer to major semiconductor device makers in Silicon Valley will help to further advance the technology and solve technical issues, especially in the areas that other U.S. consortiums do not cover enough, including advancements in the substrate, interposer and the fabrication of the package, according to the US-JOINT Consortium.
“Today’s rapidly expanding next-generation semiconductors for generative AI and autonomous driving require new approaches to advanced packaging technologies, such as 2.5D and 3D,” said Hidenori Abe, executive director of the electronics business at Resonac. “In recent years, major semiconductor manufacturers and fabless companies in Silicon Valley, including GAFAM, are designing semiconductors in- house and creating new concepts in back-end packaging one after another. This is where the US-JOINT consortium can contribute significantly with our leading technology in materials and equipment on-shore in the U.S.”
2.5D and 3D are among the main types of advanced packages. GAFAM stands for Google, Apple, Facebook, Amazon and Microsoft.
“This facility will allow IC design companies without assembly competencies and capacity to validate their package designs instead of relying on existing subcontractors or wafer foundries. This collaboration also allows the consortium members to better understand the needs and direction of future advanced applications,” added Bob Chylak, senior vice president and chief technology officer of Central Engineering at Kulicke and Soffa (K&S), in a recent interview.
The US-JOINT consortium includes a dozen companies with various expertise. The latest member is 3M, a U.S. supplier of materials and processing aids for semiconductor polishing, advanced packaging, and chip transport applications.
“As the demands of AI and other high-performance computing technologies increase, suppliers must work together to provide comprehensive solutions to tough challenges on increasingly shorter timelines,” said Steven Vander Louw, 3M’s president of display and electronics product platforms.